Silicons challenger

SILICON'S days as the king of microchips for computers and smart devices could be numbered, thanks to the development of the smallest transistor ever to be built from a rival material, indium gallium arsenide.

The compound transistor, built by a team at the Massachusetts Institute of Technologys (MIT) Microsystems Technology Laboratories, performs well despite being just 22 nanometres (billionths of a metre) in length. To keep pace with the demand for ever-faster and smarter computing devices, the size of transistors is continually shrinking, allowing increasing numbers of them to be squeezed onto microchips. But as silicon transistors are reduced to the nanometre scale, the amount of current they can produce is also shrinking, limiting their speed of operation. This has led to fears that Moores Law (the prediction that the number of transistors on microchips will double every two years) could be about to come to an end, says Jesus del Alamo of MITs Department of Electrical Engineering and Computer Science, one of the developers of the new transistor.

To keep Moores Law alive, researchers have for some time been investigating alternatives to silicon that could potentially produce a larger current even when operating at smaller scales. One such material is the compound indium gallium arsenide, which is already used in fibre-optic communication and radar technologies and is known to have extremely good electrical properties.

But despite recent advances in treating the material to allow it to be formed into a transistor in a similar way to silicon, nobody has yet been able to produce devices small enough to be packed in ever-greater numbers onto tomorrows microchips.

Now, using the material, MIT scientists have shown that it is possible to build a nanometre-sized metal-oxide semiconductor field-effect transistor (MOSFET), the type most commonly used in logic applications such as microprocessors. Their next step will be to work on further improving the electrical performanceand hence the speedof the transistor by eliminating unwanted resistance within the device. Once they have achieved this, they will attempt to further shrink the device, with the ultimate aim of reducing the size of their transistor to below 10 nm in gate length.

Stories compiled by R. Ramachandran